1. Technical Field
This invention relates to processors and, more particularly, to reconfigurable processors including programmable logic arrays.
2. Discussion
Conventional microprocessors typically include a central processing unit (CPU), an instruction memory, a data memory, and I/O devices which are interconnected via a high speed bus. The conventional microprocessor operates according to Von Neumann architecture. In other words, the CPU executes a series of instructions, stored in the instruction memory, one at a time using fixed hardware. The interconnecting bus and sequential execution rate-limit the throughput of the Von Neumann architecture microprocessor. The rate limitations can be ameliorated through use of parallel processors at the expense of higher cost and power consumption, lower reliability, and increased difficulty associated with partitioning complex problems.
Therefore, it is desirable to design a processor which increases throughput without increasing cost, power consumption and partitioning complexity, and without decreasing reliability.